The present invention relates to an error judging method in an information processing apparatus capable of accessing a data memory different from a main memory for storing operation control software, and having a plurality of operation levels for executing processes associated with interruption processing and a set of general registers arranged in units of operation levels to switch processes upon an interruption operation, for saving the content of a process state register for storing a present process state into a corresponding general register when the present operation level is changed into a new operation level, and for restarting the previous process in accordance with the content of the general register and, more particularly, to a method of judging an error occurring when the information processing apparatus accesses the data memory.
A method of judging an access error of a data memory and level change processing in a conventional information processing apparatus of this type will be described below.
In a conventional information processing apparatus, when a uncorrectable error is detected upon access of the main memory for storing operation control software, the operation of the information processing apparatus is stopped. However, when a data memory access error is detected, the present software processing is automatically interrupted and transferred to an exceptional processing program under the control of hardware/firmware of the information processing apparatus.
The term "exceptional" indicates a condition detected by the information processing apparatus, such that the present process cannot be continued any longer. When hardware/firmware of the information processing apparatus detects the data memory access error, information stored in the process state register, necessary for continuation of the process, is saved in the main memory. Control is automatically transferred to the exceptional processing program, and predetermined exceptional processing is performed.
Level change processing by an interruption operation will be described. A plurality of operation levels for operating processes associated with an interruption operation are available in the information processing apparatus. When an interruption request for an operation of a higher level is received during operation at a given level, the present process is interrupted, and the process of a higher level is started in response to the interruption request.
Level change processing will be described with reference to FIG. 2. The information processing apparatus comprises a priority control unit 11 for determining whether an interruption level is higher than the present operation level upon generation of an interruption signal, a level indicating unit 16 which represents the present operation level, and a set of general registers 9 respectively corresponding to operation levels to perform process switching by the interruption signal.
When an interruption signal is generated during an operation at a given level and the priority control unit 11 determines that the interruption level is higher than the present operation level, a fixed address of firmware is detected under hardware control, and interruption processing is executed.
Firmware microinstructions are stored in a control memory (CSM) 13. A microinstruction read out from the control memory 13, and then stored in a control register (CSR) 14, is executed by an FW control unit 15.
In interruption processing, the process state of the present operation level, i.e., PSR data stored in a process state register (PSR) 1, is saved in the corresponding general register 9. Process state information required for a new process is read out from a main memory 17 and stored in the process state register 1. The content of the level indicating unit 16 is updated to a level corresponding to the interruption signal, and the new process is started.
In order to restore the previous process at the end of the new process, the content of the general register is read out and stored in the process state register 1. The content of the level indicating unit 16 is set at the previous operation level, and, therefore, the previous level is restarted.
The above description is concerned with the general operation of level change processing, and a schematic flow chart for the level change is shown in FIG. 3.
As described above, in the conventional information processing apparatus, when the data memory access error is detected, exceptional processing is automatically executed under the control of hardware/firmware. Therefore, control by software cannot be performed. When an access error of the main memory which stores software instructions is detected, system-down of the information processing apparatus inevitably occurs. However, the data memory access error is detected, the exceptional processing program is executed independently of software control. As a result, the present process is interrupted.